WRspice Circuit Simulator
IC Design Software for Unix/Linux and Windows
Whiteley Research Inc., 456 Flora Vista Avenue, Sunnyvale CA 94086 www.wrcad.com
WRspice Circuit Simulator
Whiteley Research Inc., www.wrcad.com

Click here to browse the on-line WRspice manual.
Click here to enter the on-line WRspice help system.

WRspice  is a powerful and flexible circuit simulation and analysis tool. WRspice is a major extension of Jspice3, which was derived from Berkeley Spice3f4 and Spice2g.6. While WRspice is being developed to include new features, it will continue to support those capabilities and modes which remain in extensive use with the Spice2 and Spice3 programs. It also has extensions for compatibility with other commercial SPICE simulators.

WRspice makes extensive use of input graphics and the point and click metaphor for program control. About a dozen different control panels are available from a toolbar for controlling various aspects of simulator operation. The user can open a selection of control panels and arrange them according to preference. An "update" command saves the arrangement for future WRspice sessions. WRspice does not contain an internal schematic capture front-end. Instead, it is designed to work in conjunction with the powerful Xic graphical editor.

WRspice includes several unique features, including a built-in Verilog parser and language extensions for mixed-mode (analog/digital) simulations, and random noise sources.

Although the command line interface remains (though it has been enhanced) many users prefer the graphical controls. The large number of "set" variables has been reduced to a few graphical buttons and input boxes.

Context sensitive help is provided throughout. The HTML-based help system functions as a web browser, making Internet resources conveniently available. The help database can be easily augmented with site-specific information.

WRspice works seamlessly with the Xic graphical editor program, providing the illusion of a single application to the user. Xic provides a graphical framework for generating input from a schematic, initiating the simulation run, and plotting output. WRspice is also highly effective as a stand-alone application, where input is supplied in ASCII files using a superset of the industry standard SPICE syntax.

A powerful scripting language and interpreter are provided, so that automated simulation and data manipulation can be employed. The syntax used is an efficient but easy to learn C-like scripting language representing a superset of the capabilities of the scripting language used in Spice3.

Commands exist for certain repetitive analysis types, such as Monte Carlo and operating range analysis. A "loop" command analyzes a circuit while varying circuit parameters, producing multi-dimensional output vectors. WRspice has the capability of parceling out tasks to other machines on a network, greatly reducing the time required for a multi-analysis job.

WRspice provides the following basic analysis types:

  • DC Operating Point
  • DC Sweep (two dimensions)
  • AC
  • Noise
  • Distortion
  • Transfer Function
  • Sensitivity
  • Transient
  • Operating Range
  • Monte Carlo
The ac, noise, transfer function, and transient analyses can be performed at every point of a dc sweep using the "loop" analysis mode.

WRspice includes a Verilog parser and support for "verilog blocks" embedded in circuit descriptions. This facilitates mixed-mode simulation, and instrumentation for stochastic analysis.

The device model library provides the following devices:

  • Capacitor
  • Inductor and Coupled Inductors
  • Resistor
  • Switch (current-controlled and voltage-controlled)
  • Dependent and Independent Current and Voltage Sources
  • Transmission Lines (lossless, lossy convolution model, lossy Pade approximation model, lumped element URC model)
  • Bipolar Transistor (standard and VBIC models)
  • Junction Diode
  • JFET
  • Josephson Junction
  • MESFET
  • MOSFET
The on-line documentation provides up-to-date information on currently available device models. In particular, the MOS models currently included are listed here.

A powerful graphical plotting facility is available for plotting simulation results, with hard copy support for Postscript (mono and color), HP PCL, HPGL, and others.

Whiteley Research provides bug fixes within hours to days of reporting, and limited customization and consulting for customers of WRspice. Upgrades are provided frequently over the Internet.

WRspice is available for FreeBSD, Linux, Apple OS X, and Microsoft Windows.


Announcing WRspice Generation 3

Whiteley Research Inc. is pleased to announce the third generation of the WRspice circuit simulator.


New Features in WRspice-3

Installation

WRspice Generation 3 has built-in capability for automatically checking for update availability, and for actually downloading and installing updates. After installing for the first time, the passwd command should be run to enable these features.

Compatibility Improved

Many changes were made to provide direct support for the IBM_9SF foundry PDK models and similar, which make extensive use of HSPICE-specific constructs and features. Keyword and comment handling have been extended to support syntax used by other simulators.

Expression Syntax More Flexible

The syntax accepted by the expression parser is now more flexible and C-like, but 100% backward compatible. Ternary conditionals
expr1 ? expr2 : expr3
are now recognized. A number of new math functions were added, including new random generators consistent with HSPICE.

Improved Parameter Handling

Parameter (.param) handling was enhanced to provide quicker circuit loading when large numbers of parameter definitions are present. User-defined functions can now be defined in .param lines.

Much More

Error logging to a file is now supported in graphical mode. Plot windows can now display up to 18 traces in "separate" mode, up from 10 in earlier releases. The code that handles the initial input file parsing was rewritten, to better handle both parameter and shell expansion. Many more incremental improvements were made, see the release note for more information.

Copyright © Whiteley Research Inc. 2004