Node name mapping is turned on after the operation completes. Since a schematic produced in this way has every node name defined by a terminal, using the defined names, which correspond to the original SPICE file, is convenient.
The three choice buttons are:
This functionality is also available through the !source command available from the prompt line.
If create is set, this command will create a schematic hierarchy from the SPICE file. The function may be used as follows: open a new cell and go to electrical mode. Use the !source command or Source SPICE button to read in a SPICE file. The devices and subcircuits referenced in the file will be arrayed in the drawing, each with the appropriate properties applied. Named vcc terminals are placed at each device contact point, which establish connectivity (wires are not used). The drawing can be used for simulation or any purpose just as a schematic entered in the standard way. The created schematic can be modified by the user to replace the named terminals with wires and reset the device locations, to make a ``real'' schematic that is aesthetically decent.
Subcircuits are created as needed. They must be written out later (e.g., with the Save command). If a file exists in the search path with the same name as a subcircuit, it is ignored, as the subcircuit cells are created internally. When writing, therefore, it is possible to replace an existing cell file, but the previous version is retained with a ``.bak'' extension.
Devices are instantiated as needed, and given an assigned name from the SPICE file.
If create is not active, no new devices or subcells will be instantiated, though devices in the drawing with names which match those in the SPICE file will have their properties updated. Properties of existing devices are updated whether or not create is active. Similarly, if a subcircuit already exists, its devices will be updated, but no new devices will be created in the subcircuit.
If all devs is not set, only devices that have been assigned a name by the user will have properties updated. Devices with internally assigned names are skipped. This is to avoid problems due to the fact that internally assigned names will change when the circuit is edited, and updating from an out-of-sync SPICE file could be a disaster.
If clear is set, then the electrical part of the cell and subcells will be cleared before the SPICE information is read. This ensures that the cells contain only information supplied in the SPICE file.
In order to determine if a semiconductor device is a p-type or n-type, the device model must be available. The semiconductor devices can be resolved (as p or n type) if the referenced model is not in the input file if 1) the model is in the model library database, or 2) the model name starts with ``n'' or ``p''.
Each of the option buttons has a corresponding !set variable. If the variable is changed while the pop-up is visible, the pop-up will be updated. Conversely, changing the state of the option buttons will set or unset the corresponding variables. The pop-up check box will be checked if the corresponding variable is set. The names of the corresponding variables are given in the table below.
all devs | SourceAllDevs |
---|---|
create | SourceCreate |
clear | SourceClear |